Configuring a Custom Memory Map with VTOS Program
VTOS firmware automatically manages the memory map of the target processor. In this mode you create program, erase, lock, unlock, and read operations by specifying the byte offset within the flash device to access. The example below demonstrates a Flash Erase Operation configured for a NOR Flash device.
In this instance, the erase operation will start at a 32 MiB offset (byte offset 0x02000000) and will erase exactly 1 MiB of data (0x00100000 bytes). The absolute base address of the NOR Flash part was automatically selected by VTOS Program.
In some instances it may be necessary for you to specify the exact base address in the memory used for programmable devices. The following sections detail the procedure for creating a customer memory map using VTOS Program.
Creating a Custom Memory Map for NOR Flash Devices
Parallel NOR Flash devices are connected to the target processor using a local bus connection. Once the local bus is configured, the entire NOR Flash device can accessed directly using basic processor reads and writes in the memory map.
Follow these steps to override the automatic memory map configured by VTOS Program:
- Create a new project for VTOS Program, selecting the NOR Flash option for the processor used in your design.
- VTOS Program populates the Configuration tree in the left pane with the local bus chip selects available on your processor. Select the chip select where your NOR Flash device is connected. We selected Chip Select 0 in this example.
- From the the Config Mode tab in the right hand pane, there are two new options available: Custom Memory Map and Custom Timing. Change the Custom Memory Map field to True to enable the custom memory map options.
- The Custom Memory Map includes two configurable fields – modify as needed for your design.
- Base Address – this 32-bit value specifies the base address that is assigned to the local bus chip select. Note that the address range 0x0000_0000 to 0x03FF_FFFF is reserved.
- Window Size – this specifies the length of the memory window assigned to the local bus chip select. This value must a power of 2.
- To add one or more NOR Flash devices, go back to the tree view, right-click on the desired chip select and select Add NOR Flash Device.
- From the Config Mode tab, configure the bus width and any other advanced options as needed.
Configuring Custom Timing Values for NXP QorIQ P5xxx Processors
1. From the tree view, select the desired chip select.
2. From the Config Mode tab, set the Custom Timing field to True. This enables the LBC ORn Timing parameter.
3. Set the LBC ORn Timing field to match your desired timing parameters. The contents of this field are written to the lowest 15 bits of the LBC_ORn register in the QorIQ P5xxx enhanced Local Bus Controller.