DDR Calibration and Verification Tool for i.MX6
Kozio announces the release of VTOS DDR™ support for all designs using Freescale’s i.MX6 processor family. This release applies to all Freescale i.MX 6 series products: Quad, Dual, DualLite, Solo, and SoloLite.
VTOS DDR provides everything you need to configure, verify, and calibrate the DDR memory and DDR PHY of your board design.
VTOS DDR™ Quick Overview
The VTOS DDR system is comprised of three major components: VTOS DDR host software, VTOS DDR firmware, and the vAccess DLL™. The VTOS DDR host software provides a user interface focused on DDR calibration and testing. It communicates with VTOS DDR firmware through a communication channel such as a serial port. The vAccess DLL communicates with the VTOS DDR host software using an inter-process communication method.
The VTOS DDR firmware executes from internal RAM of the i.MX 6 Series, and not from the external DDR device, so that it does not interfere with program execution. The firmware provides a rich set of capabilities which are exposed through the vAccess API and the VTOS DDR host software. Both the vAccess DLL and VTOS DDR host software run on your PC.
Calibration of the DDR setup is frequency dependent. Changing the DDR clock frequency requires running the various calibration sequences and obtaining a new set of delay values. DDR timing variations are closely associated with board design and the selected DDR memory part. To some extent, DDR timing is also influenced by deviations between manufactured i.MX6 chips.
VTOS DDR performs various calibration processes on the i.MX 6 Series DDR controller for use with LPDDR2 and DDR3 memories. These calibration processes are needed to fine tune various delay-line parameters for optimal performance and functionality at the target frequency selected by the designer.
VTOS DDR can be used to run the calibration sequence:
- Once for a given board design, and then provide the calibration values for all manufactured boards of this board design.
- On each manufactured board as an automated assembly line procedure. VTOS Program™ can be used to program the calibration values into any programmable memory (eMMC, NOR Flash, NAND Flash) to be used as DDR preset values throughout the device’s life. The vAccess DLL can be used to automate communications with both VTOS DDR and VTOS Program using your chosen test executive.
VTOS DDR automates the following calibration steps:
- One-time, forced ZQ calibration
- Write leveling calibration
- DQS gating
- Read data DQS calibrations
- Write data DQS calibrations
Using VTOS DDR™
VTOS DDR provides a simple user interface, and working board examples, that allow you to configure and calibrate DDR memory in minutes. Use the provided board configuration settings or quickly tailor them to your custom board designs. Use the provided memory part configuration settings or tailor them to match new memory parts. Use the flexible user interface to alter any memory mapped register and run-time scripting allows you to test and tune how you desire.
Use VTOS DDR to:
- Choose, edit, or create board specific DDR settings.
- Choose, edit, or create new external memory part settings.
- Initialize DDR memory.
- Execute a calibration sequence.
- Perform all steps necessary for ZQ hardware controlled calibrations.
- Run extensive memory tests including stress, noise, burst, and constrained random tests.
VTOS DDR is an excellent solution for verifying new board designs that don’t have any software loaded. Using a JTAG programmer, load the VTOS DDR firmware into on-chip memory, communicate over a UART interface, and configure and verify your DDR memory before loading other software into it. This step alone can save weeks of efforts trying to get to stable DDR settings using a trial and error method.
VTOS DDR provides a valuable tool for verifying board level changes, qualifying second-source memory parts, and is fast enough to be used in production test to test every single cell of memory.
For additional information:
Contact us to purchase VTOS DDR and start automating your DDR calibration and test efforts.