| A Methodology for Reducing Development Time and Improving Reliability of Embedded System Hardware
by Vince Mazur
Gain insight into how today’s ad-hoc board level validation approaches can be replaced with an ordered methodology that will enable designers to automatically validate hardware designs, optimize system performance, and simplify the process of integrating new hardware with new software. Read more |
Hardware Validation
by Clive "Max" Maxfield and Joseph Skazinski
Only 10 Days to Shipping… We May Have a Memory Problem! How can software development engineers be provided a fully validated hardware platform upon which they can perform their final application integration prior to customer shipment? Read more |
Top 10 Reasons Not to Debug Hardware with Your OS and Application Software
by Steve Sheafor, Ph.D.
Despite opinions to the contrary, it is clear that the best tools not to debug new hardware is the Operating System and Application Code which will run on it. In an effort to settle this debate once and for all, we have developed the following list which you can use if your Management seems unconvinced. Read more |
| Troubleshooting Single Cell Memory Failures
This technical paper explores the detection and characterization of a single memory cell failure using kDiagnostics®. Read more |
Troubleshooting and Fast Fault Isolation with In-System Diagnostics
Product quality and reliability are first-order design requirements for any product development. This paper describes how quality and reliability can be dramatically improved with In-System Diagnostics. Read more |
Effectively Testing Embedded Display Interfaces
This is part one of a multi-part white paper series on effectively testing embedded display systems. This paper details the hardware interconnections used across the spectrum of these systems, in preparation for subsequent papers which describe specific test methodologies for displays. Read more |
| Effectively Testing the Display Pixel Interface (DPI)
This is part two of a multi-part white paper series on effectively testing embedded display systems. This paper describes a number of specific techniques for testing a parallel Display Pixel Interface (DPI), which is both the most common and the most physically complex display interconnection. Read more |
A Comprehensive Memory Validation Strategy using Advanced Processor Features
This technical paper presents a comprehensive memory validation strategy for automated tuning of memory, accurately determining the reliability of entire memory subsystems, pinpointing faults when repair is required and deploying the same core solution to be used in design and manufacturing. Read more |
Fast, Effective Embedded Testing for Custom SoCs and Classified Projects
This technical paper illustrates when and how to choose an advanced embedded test solution for classified projects and custom SoCs. Read more |
